The present invention concerns a charge pump device including, in a cascade arrangement, a plurality of stages for transferring a potential charge from one stage to the next in response to clock signals. Each stage includes, arranged between an input and an output of the latter, a switching circuit and a storage capacitor. The switching circuit is formed of a first transistor mounted with a second transistor, the drains of the first and second transistors being connected to the input of the stage, the source of the first transistor being connected to the gate of the second transistor and the source of the second transistor being connected to output of the stage and to the gate of the first transistor. The gate of the second transistor is controlled by one of the clock signals, for example via a capacitor.
A charge pump of the Dickson type is commonly used in devices such as EEPROMs, for example, which require a important voltage increase to be obtained from a relatively low available voltage. A Dickson type charge pump is essentially formed of a plurality of stages arranged in a cascade. Each stage of the pump includes an active device which leads the current in a single direction and a storage capacitor. FIG. 1 shows an example of another embodiment of a charge pump. Stages 1 to N are connected to each other in a cascade arrangement by an active switching device 10, 20 formed of two transistors 11, 12.
The choice of using a circuit with two transistors rather than a simple diode connected transistor (the drain is connected to the gate) prevents voltage drops in the charge pump due to the inherent threshold voltage effects of diode connected transistors. Indeed, for a diode connected transistor, the threshold voltage can be 2 volts or more, thus limiting a minimum exploitable voltage Vin to 2 volts or more.
Switching circuit 10, 20 is controlled by clock signals PA, Pb via a capacitor Co which reduces the voltage drop in the switching circuit. The charge pump thus has an almost ideal multiplication factor, which allows. a higher output voltage Vout to be obtained. This charge pump is conventionally controlled by a quadriphase clock with non interlaced signals PHI, PA, PHINOT, PB as illustrated in FIG. 2. The charge pump is activated by applying the four clock signals PHI, PA, PHINOT, PB to the plurality of stages 1 to N. When the boosted voltage Vout is no longer required, the pump is deactivated by stopping the application of the clock signals or by a device which interrupts the supply of boosted output signal Vout.
The operating mode of the charge pump is explained with reference to FIGS. 3 and 4. It is assumed that all the internal nodes of switching device 10, 20 are at zero potential before the pump is started-up.
FIG. 3 shows the configuration of the stage during an active sequence CPA of clock signal PHI. Transistor 11 is in a non conducting state (OFF) which prevents the current flowing and transistor 12 is in a conducting state (ON) authorizing the current to pass. In this configuration, the potential VAi at node Ai is equivalent to the potential VAi+1 at node Ai+1. This first sequence corresponds to a boosting phase of potentials VAi and VAi+1, depending on the capacitive charge of capacitor Cb which flows through transistor 12 in capacitor Ca.
FIG. 4 shows the configuration of a stage of the pump during an inactive phase {overscore (CPA)} of clock signal PHI. Transistor 11 is in the conducting state, while transistor 12 is in the non conducting state preventing the current from flowing from node Ai to node Ai+1. In this configuration, potential VAi at node Ai is equivalent to potential Vc at node c which is the junction point of the source of transistor 11 with the gate of transistor 12.
These two sequences are alternately achieved on the even and odd stages to supply at the chain output a boosted voltage Vout which corresponds to an input value Vin plus a certain number of times a value approaching the peak voltage of clock signals PHI and PHINOT.
Such regular operation of the charge pump can only be implemented on condition that the internal nodes of switching device 10 are initially at a zero potential. However, in practice, certain internal nodes in the plurality of capacitive stages N keep voltage potentials having values comprised between 0 volt and Vout after a pump charge sequence. This causes problems when the pump is next started-up which leads to deterioration in the increase in signal Vin in most cases and to no increase in signal Vin in the worst cases. Indeed, in the worst cases, the node c in one or more stages stores a voltage across capacitance Co greater than potential VAi+1 of node Ai+1 which polarises transistor 12 in the conducting state. Thus, node Ai+1 is at a potential VAi+1 close to potential VAi of node Ai. Given that potential VAi+1 plays the role of control voltage for transistor 11, the latter remains in the non conducting state thus preventing any discharge of potential Vc of node c in the circuit. Consequently, in this case, the pump cannot be started-up normally the next time since one or more stages permanently remains blocked in the configuration shown in FIG. 3, which results in a transfer of alternating charge between capacitors Ca and Cb, preventing the effect of the charge pump from being produced.
FIG. 5 illustrates two consecutive charge cycles D1 and D2. The first charge cycle D1 shows the pump starting-up in ideal conditions, i.e. without any charged internal node while the second consecutive cycle D2 shows the charge degradation in the pump when the latter has stored potentials in its internal nodes during the preceding charge cycle D1.
This type of charge pump is also known from U.S. Pat. No. 4,734,599. This Patent discloses a charge pump using PMOS transistors similar to that shown in FIG. 1. The effect of the charge pump is reversed. Output voltage Vout is a negative high voltage, which does not change the general operating principle of the pump.
A PMOS transistor is in a conducting state when the potential of its gate is less than the potential of its source by at least a threshold voltage (Vt) of the transistor. This threshold voltage depends in particular on the voltage applied to the source of the transistor. Thus, Vt may vary approximately between 0.7 volt and 3 volts respectively, for a low voltage applied to the transistor source, of the order of one volt, and for a high voltage applied to the transistor source, of the order of ten or so volts.
As in the aforementioned prior art, voltage potentials are kept in certain circuit nodes. However, as a result of the high amplitude of the clock signals used, in particular 5 volts as suggested in this document, the potential of the gate of transistor 11 is always made less than the potential of its source during the associated clock signal pulse, whatever the effective threshold voltage of the transistor in the aforementioned range. Since transistor 11 is in a conducting state, potential Vc is brought to potential VAi which allows transistor 12 to be in a non conducting state.
However, the solution provided by this document does not resolve the problem of starting-up for clock signals of smaller amplitude, in particular less than 3 volts. Indeed, one of the permanent concerns of those skilled in the art is to consume as little energy as possible in numerous low consumption devices. This is why, clock signals having a peak voltage of less than 3 volts are preferably used, for example between 1.5 and 2 volts. In these energy saving conditions, the charge pump device of U.S. Pat. No. 4,734,599 has the same drawbacks as the aforecited prior art.
The object of the present invention is to overcome the aforecited drawbacks of the prior art and, in particular, to provide a charge pump device which re-establishes, between each activation of the pump, the potential conditions required for optimum operation of the switching circuit upon starting-up and with reduced energy consumption.
These objects are achieved as a result of a charge pump device as defined hereinbefore and characterized in that at least one of the stages further includes starting-up means at a junction node c of the source of the first transistor with the gate of the second transistor having a potential Vc, said starting-up means being arranged for keeping the second transistor in a non conducting state between two charge cycles of the charge pump device.
Thus, the ideal starting-up conditions of the charge pump are achieved and the charge incidents of the prior art are thus avoided.
Preferably, the charge pump device according to the invention includes a plurality of stages, each being provided with starting-up means.
More particularly, when the charge pump device according to the invention operates in forward current, the starting-up means include means for keeping the potential Vc of node c at a value less than or equal to that of a potential at the stage output.
Consequently, the junction node of the source of the first transistor with the gate of the second transistor is kept at a lower potential value than that of the source of said second transistor, which keeps the latter in a non conducting state between two activations of the pump.
Thus, if the charge pump device according to the invention operates in reverse current, the starting-up means include means for keeping the potential Vc of node c at a value which is higher than or equal to that of a potential at the stage output. The junction node of the first transistor source with the gate of the second transistor is kept at a higher potential value than that of its source, which keeps the second transistor in a non conducting state between two activations of the pump.
In a first embodiment of the invention operating in forward current, the starting-up means include a switch arranged between the junction node and an earth terminal. Advantageously, the junction node is then discharged of its potential.
According to a second embodiment, the starting-up means include a switch arranged between the junction node and the stage output. The minimum condition for keeping the second transistor in a non conducting state is then achieved.
In an embodiment operating in reverse current, the starting-up means include a switch arranged between the junction node and a positive potential source. The switching circuit and the starting-up means are then suited to the charge pump according to the invention for operation in reverse current.
The charge pump according to the invention may include first and second transistors of any of the following type: bipolar or junction, junction field effect (FET) or insulated gate field effect (MOS).
According to a variant of the invention, the starting-up means include a resistor arranged between the switch and the earth potential. A resistive connection between the junction node and the earth potential is then established.